Advanced Hardware And Pcb Design Masterclass 20...

| Format | Dates | Fee (USD) | Early Bird Discount | | :--- | :--- | :--- | :--- | | Live Online (Instructor-led) | May 12–16, 2026 | $1,895 | $1,595 (until Apr 15) | | In-Person (Lab-based) | June 9–13, 2026 – Austin, TX | $2,495 | $2,195 (until May 10) |

Group discounts available for 3+ participants from same organization.

As components shrink, power density increases. A 100W processor in a BGA package requires more than just a heatsink; it requires a thermal via strategy. Advanced Hardware and PCB Design Masterclass 20...

Techniques covered:

Students perform thermal simulations (steady-state and transient) to see how a hot FPGA affects a nearby MEMS oscillator (temperature drift) and how to isolate heat zones on a dense board. | Format | Dates | Fee (USD) |

Decoupling strategy (per IC):

| Capacitor | Value | Package | Location | |-----------|-------|---------|----------| | Bulk | 47 µF (X5R) | 0805 | near power entry | | Mid-freq | 1 µF | 0402 | every 2–3 power pins | | High-freq | 100 nF | 0201 | directly under BGA (back side) | | Ultra-high | 10 nF + 470 pF | 0201 | adjacent to die power pins | As components shrink, power density increases

Example placement for STM32H743 (TFBGA-240):

VRM placement:
TPS51200 (DDR termination regulator) → placed within 5 mm of DDR3L chip → 0.1µF on VTT output.

In the era of IoT, wearables, automotive electronics, and high-speed computing, the difference between a prototype and a production-ready product lies in advanced PCB design. This masterclass moves far beyond simple routing and schematic capture. It is an intensive, hands-on journey into the physics of electronics—teaching engineers how to tame signal integrity, manage power distribution, mitigate EMI, and design for manufacturing (DFM).

Participants will transition from being “PCB layout users” to hardware design experts capable of building 8–16 layer, impedance-controlled boards for microprocessors, FPGAs, and RF circuits.