The problems in Kang are notoriously difficult. Problem 5.12 (regarding inverter sizing for minimum delay) is a common interview question at Apple. Do not just read the solution; simulate the circuit in SPICE (or a free tool like LTspice) to verify the result.

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| Topic | Problem type | |--------|----------------| | Inverter VTC | Find ( V_M ) given ( V_Tn, V_Tp, \mu_n, \mu_p, W/L ) | | Delay | Compute ( t_PHL ) from ( C_L, I_Dsat ) | | Logic gates | Size transistors for symmetric switching | | SRAM | Calculate read static noise margin (SNM) | | Dynamic logic | Simulate charge redistribution error | The problems in Kang are notoriously difficult


Sung-Mo Kang’s "CMOS Digital Integrated Circuits" is a concise, practical resource for students and engineers learning CMOS VLSI design. This post highlights what makes the book useful, who it’s for, and how to use a PDF copy effectively for study or reference. Sung-Mo Kang’s "CMOS Digital Integrated Circuits" is a