Verigy 93k Tester Manual 【RELIABLE】
Today, the systems are called V93000 (Versatile 93000), not Verigy 93K. However, the Verigy 93K tester manual remains 80% relevant. Only the software GUI and a few high-speed pin cards (e.g., PS900) have changed. If you understand the original Verigy manual, you can operate any V93000 with minimal retraining.
Manufacturers continue to support "legacy mode" in SmarTest 8 that mimics Verigy SmarTest 5 behavior—proving the enduring value of the original documentation.
If you want, I can:
Verigy (now Advantest) V93000 (93k) tester manuals are primarily distributed through Advantest's proprietary portals, but several technical guides and reference manuals are available through authorized partners or archive sites. Official Documentation Center The primary source for all current V93000 manuals is the Advantest Technical Documentation Center (TDC) Requires a service agreement and a myAdvantest portal
Includes the SmarTest help system, hardware specifications, and maintenance guides. AI Support:
The TDC now features an AI-powered assistant to help engineers find specific step-by-step guidance through natural language queries. ADVANTEST CORPORATION SmarTest Software & Programming Guides SmarTest Overview:
A detailed breakdown of the software environment used to control the tester, including pin configuration, level setup, and timing. SmarTest 7 Digital Training: Documentation for the Smart Scale
series, covering test flow, calibration, and debugging tools like Shmoo plots. Device License Lab: For software administration, the V93000 Device License Lab Guide provides instructions on using the
license management utility and starting SmarTest in offline mode. Hardware & System Reference Hardware Overview:
Covers the SOC tester platform architecture, water cooling technology, and card cage structure. System Reference: Includes detailed material on system start-up and shutdown
, DUT board mechanical design, and analog module restrictions. Direct-Probe™ Manuals:
Documentation for wafer-stage testing and signal integrity maintenance. Utah Nanofab Third-Party & Auxiliary Guides user guides - CMC Microsystems
If you are writing a test program, you likely need the "Test Method Reference Manual". This manual explains the parameters for functions like Functional Test, Level Check, and DC Measurement.
If
Introduction
The Verigy 93K tester is a high-performance, precision instrument used for testing and measuring the electrical characteristics of semiconductor devices, particularly in the field of wafer probing and device testing. The device is widely used in the semiconductor industry for its accuracy, reliability, and flexibility. To ensure optimal performance and accurate measurements, it is essential to understand the operating principles, features, and procedures outlined in the Verigy 93K tester manual. This essay provides an in-depth review of the Verigy 93K tester manual, covering its key components, operating procedures, and applications.
Overview of the Verigy 93K Tester
The Verigy 93K tester is a modular, high-speed testing system designed to measure the electrical characteristics of semiconductor devices, including parametric test, functional test, and reliability test. The system consists of several key components, including the test head, motherboard, and peripherals. The test head is the core component of the system, housing the precision analog and digital measurement circuitry. The motherboard provides the interface between the test head and the device under test (DUT), while the peripherals include the power supplies, precision voltage sources, and measurement units.
Key Features and Specifications
The Verigy 93K tester manual highlights several key features and specifications of the device, including:
Operating Procedures
The Verigy 93K tester manual provides detailed operating procedures for setting up and using the device. These procedures include:
Applications
The Verigy 93K tester is widely used in the semiconductor industry for a variety of applications, including:
Conclusion
In conclusion, the Verigy 93K tester manual provides a comprehensive guide to the operation and use of the Verigy 93K tester. The device is a high-performance, precision instrument used for testing and measuring the electrical characteristics of semiconductor devices. By understanding the key features, operating procedures, and applications outlined in the manual, users can optimize the performance of the device and achieve accurate measurements. The Verigy 93K tester is a valuable tool for the semiconductor industry, and its manual serves as a critical resource for anyone working with the device.
Recommendations
Based on the information provided in the Verigy 93K tester manual, several recommendations can be made:
By following these recommendations and using the Verigy 93K tester manual as a guide, users can get the most out of their device and achieve high-quality results.
Mastering the Verigy 93000 (V93K) Tester: A Comprehensive Guide
In the world of Automated Test Equipment (ATE), the Verigy 93000 (now Advantest V93K) stands as the industry standard for SOC (System-on-a-Chip) testing. Whether you are a test engineer debugging a new silicon wafer or a production manager optimizing throughput, understanding the "manual" operations and architecture of this platform is essential.
This guide serves as a high-level manual for navigating the V93K ecosystem, covering its architecture, software environment, and best practices for test development. 1. Understanding the V93K Architecture
The V93K is unique because of its per-pin architecture. Unlike older testers that share resources across multiple pins, every pin on a V93K has its own independent timing generator, sequencer, and DC resources.
The Test Head: Houses the "pins" or channels. Depending on your configuration (C-Class, PS1600, or the newer EXA Scale), the density and speed of these pins will vary.
The Workstation: Usually a Linux-based controller running the SmarTest software. This is where you write code and control the hardware.
The Cooling System: High-performance testing generates heat; the V93K typically uses liquid or air-chilled systems to maintain thermal stability. 2. Software Interface: SmarTest 7 vs. SmarTest 8
The "manual" for a V93K is largely a manual for SmarTest. There are two primary versions currently in use:
SmarTest 7: The classic version. It is workbook-based (Excel-like interface) where you define levels, timing, and test suites in distinct sheets.
SmarTest 8: The modern evolution. It is object-oriented and utilizes a more streamlined, C++ based environment. It is designed for massive multi-site testing and faster compilation. 3. Key Operational Steps
To run a test on the V93K, you must navigate several core components: A. The Device Development Tool (DDT)
This is where you define the physical mapping. You tell the tester which "Tester Channel" is connected to which "DUT Pin." B. Levels and Timing Levels: Define the voltage thresholds (VIL, VIH, VOL, VOH).
Timing: Define the "Period" of the test and the "Edges" (when a signal should transition or when the tester should strobe the output to check for a pass/fail). C. The Vector/Pattern Files
The V93K uses .avc (ASCII) or compressed binary formats for patterns. These files contain the 1s and 0s that represent the functional logic of the chip. D. Test Methods
These are the C++ or Java-based scripts that execute the tests. A standard manual procedure involves: Setting the levels. Bursting a pattern. Measuring a DC value (like IDDQ or standby current). Returning a "Pass" or "Fail" to the sequencer. 4. Common Troubleshooting (The "Service Manual" Approach)
When the tester isn't behaving, engineers typically follow these steps: verigy 93k tester manual
Diagnostic Run: Use the built-in "Self-Test" to ensure the hardware pin cards are calibrated.
Contact Check: Ensure the probe card or test socket is making clean contact with the silicon.
Level Shifting: Manually tweak the VDD levels in the software to see if the part begins to pass (indicating a marginality issue). 5. Best Practices for Test Engineers
Modular Coding: Write reusable Test Methods to save time across different projects.
Multi-site Efficiency: Always design your test flow to test as many chips as possible simultaneously (parallel testing) to reduce the Cost of Test (CoT).
Documentation: Keep a rigorous log of change histories in your SmarTest setup—small changes in timing can lead to massive yield "swings." Conclusion
The Verigy 93000 is a powerhouse of precision. While a physical manual would span thousands of pages, mastering the platform comes down to understanding the SmarTest environment and the per-pin hardware logic. As the industry shifts toward SmarTest 8 and EXA Scale hardware, staying updated on these software transitions is the key to a successful career in ATE.
To verify the Verigy V93000 (now Advantest V93K) tester manual or documentation, you must access the official myAdvantest portal
, as most technical manuals are protected and require a service agreement. ADVANTEST CORPORATION How to Access the Official Manuals Log in to myAdvantest : Go to the myAdvantest portal Request Software Center Access : If you don't have it, navigate to Self Services Software Center
. Access usually requires an active service agreement with Advantest. Use SmarTest Help : If you are already on a workstation, you can open the Technical Documentation Center (TDC) directly within SmarTest by selecting Help Contents Dynamic Help
: For specific API verification, highlight the API in the Test Method editor and click Dynamic Help to see relevant info from the TDC. ADVANTEST CORPORATION Key Technical Manuals & Resources System Reference
: Covers startup/shutdown, test head components (CTH/STH), and DUT board design. SmarTest Software Overview
: Essential for understanding test flow generation and the Test Method editor. Hardware Overviews
: Provides details on specific modules like the SMU8 (DC measurement) or AVI64 (analog pins). Direct-Probe™ Evolution
: Documentation on wafer probing and signal integrity at the die level. Utah Nanofab Safety & Connection Essentials Terminal Ratings
: Always check the manual for maximum ratings before making connections to prevent fire or shock. Physical Connections
: Ensure proper connection of "air input" (utility box), power cables for the test head (STH/CTH), and Workstation Ethernet before powering up. hardware pinout for a particular card? V93000 Technical Documentation - Advantest
The Advantest (formerly Verigy) V93000 (93k) is a scalable SOC test platform, and its official documentation is primarily managed through the Technical Documentation Center (TDC). Because these manuals are proprietary, you typically need an active service agreement with Advantest to access the full technical library. How to Access Official Manuals
Online TDC: You can browse documentation online or download a standalone version for Windows or Linux from the Advantest MyAdvantest portal.
SmarTest Software: If you have the SmarTest software installed, go to Help > Help Contents to open the integrated documentation.
Software Center: Full PDFs for system components and hardware can be downloaded from the Advantest Software Center once access is approved. Key Manuals and Documentation Areas
The 93k documentation is split into several specialized categories based on user needs:
Hardware Overview: Covers the scalable SOC platform, workstation, water cooling technology, and card cage structure.
System Reference: Detailed reference material on test system components, start-up/shutdown procedures, and analog modules.
DUT Board Design: Mechanical and performance considerations for designing device-under-test (DUT) loadboards.
Instrument Manuals: Specific guides for cards like the Pin Scale 800 digital card, AV8 Analog Card, or DPS32 power supply.
Training & Programming: Lab guides for SmarTest software, testflow setup, pin configuration, and debugging. Third-Party & Add-on Guides
If you are using high-speed extensions or specific twinning frames, you may need supplementary manuals from partners: System Reference - Utah Nanofab
The Verigy (now ) V93000 (V93K) is a modular, high-speed automated test equipment (ATE) system designed for System-on-a-Chip (SoC) semiconductor testing. Accessing the official manuals requires the Advantest Technical Documentation Center (TDC)
, a standalone help application that provides searchable content, including hardware specs, software guides, and safety ratings. Verigy 93K Hardware Architecture
The system is built on a scalable platform consisting of several key components:
93k Tester 02 Hardware Overview Rev.7.2.2.A.00 | PDF - Scribd
The Verigy 93K is a high-performance automated test equipment (ATE) platform used for digital, mixed-signal, and RF semiconductor testing. A tester manual for the 93K typically covers hardware architecture, software interface (including test program development and execution), maintenance procedures, safety guidelines, and troubleshooting. This report summarizes typical manual contents, key sections to look for, common procedures, and recommendations for obtaining and using the official manual.
The 93K’s TPP architecture allows independent timing and level per pin. The manual details:
Tip from the manual: Always initialize
setLevels()beforesetTimings()in your test method, else you risk undefined pin states.
The Verigy 93K tester manual is more than a reference—it is a course in advanced semiconductor test engineering. While dense and occasionally fragmented, it contains every piece of information needed to:
Final advice: Download the official manual for your specific software version. Keep a local copy on the tester PC and a second copy on your engineering workstation. Annotate it with your own DUT-specific notes—that annotated copy will be worth more than any commercial training course.
Need help with a specific section of the Verigy 93K manual? Leave a comment or contact your local Advantest field applications engineer (FAE). Remember: even experienced FAEs refer back to the manual weekly.
The Verigy V93000 (93k) documentation suite, managed by Advantest, consists of modular guides covering SmarTest software (7 or 8), hardware configurations, and DUT board design, accessible through the Technical Documentation Center. Comprehensive manuals and datasheets are available for various test head types and cards, including digital Pin Scale 400 and analog MBAV8 cards. Access Advantest's technical documentation at ADVANTEST CORPORATION V93000 Technical Documentation - Advantest
Verigy 93K Tester Manual: A Comprehensive Guide
Introduction
The Verigy 93K tester is a high-performance, precision instrument designed for testing and measurement applications in various industries, including aerospace, defense, and electronics. This manual provides a detailed overview of the Verigy 93K tester's features, operations, and maintenance procedures.
Table of Contents
1. Safety Precautions
Before using the Verigy 93K tester, ensure you have read and understood the following safety precautions:
2. System Overview
The Verigy 93K tester is a modular, rack-mounted instrument consisting of the following main components:
3. Hardware Components
The Verigy 93K tester consists of the following hardware components:
4. Operating the Verigy 93K Tester
To operate the Verigy 93K tester:
5. Test Setup and Configuration
To set up a test:
6. Measurement and Test Functions
The Verigy 93K tester provides various measurement and test functions, including:
7. Data Analysis and Storage
The Verigy 93K tester provides various data analysis and storage features, including:
8. Maintenance and Troubleshooting
To ensure optimal performance, regularly perform the following maintenance tasks:
9. Calibration and Verification
The Verigy 93K tester requires periodic calibration and verification to ensure accuracy and reliability. Follow these steps:
10. Specifications and Technical Data
The Verigy 93K tester has the following specifications and technical data:
Conclusion
The Verigy 93K tester is a high-performance instrument designed for precision measurement and testing applications. This manual provides a comprehensive guide to operating, maintaining, and troubleshooting the tester. By following the procedures outlined in this manual, you can ensure optimal performance and accuracy from your Verigy 93K tester.
Revision History
Warranty Information
The Verigy 93K tester is covered by a limited warranty. For more information, refer to the warranty documentation provided with the instrument.
Contact Information
For technical support, calibration, or repair services, contact:
[Your Company Name] [Address] [Phone Number] [Email Address]
The Verigy 93000 (93k) SOC Series remains a cornerstone of Automated Test Equipment (ATE) for high-performance semiconductors. Navigating its extensive documentation is essential for test engineers looking to optimize throughput and maintain signal integrity. This guide provides a strategic overview of the Verigy 93k tester manual, focusing on the SmarTest environment, hardware configurations, and troubleshooting protocols. Understanding the Verigy 93k Architecture
The 93k platform is designed around a scalable architecture that allows for "per-pin" resources. Unlike traditional testers that share resources across multiple pins, the 93k provides dedicated timing, levels, and pattern memory for each channel. This ensures that complex System-on-Chip (SoC) devices can be tested with maximum precision.
The manual typically divides the system into several key components: The Workstation: Running the SmarTest software environment.
The Test Head: Containing the pin electronics and cooling systems.
The Power Distribution Unit (PDU): Managing the high-current demands of modern processors.
The Manipulator: Providing the mechanical interface to probers or handlers. SmarTest Software Environment
The heart of the 93k manual is the SmarTest documentation. SmarTest is the software suite used to develop, debug, and execute test programs. Engineers must be familiar with the following core tools:
Pin Configuration: This section explains how to map logical device pins to physical tester channels. It covers the setup of different pin types, such as High-Speed Digital, Analog, or Power Supply pins.
Level Setup: Precise voltage levels are critical for CMOS logic. The manual details how to set VIHcap V sub cap I cap H end-sub VILcap V sub cap I cap L end-sub VOHcap V sub cap O cap H end-sub VOLcap V sub cap O cap L end-sub for various drive and receive modes.
Timing and Equations: The 93k uses an equation-based timing system. Instead of hard-coding values, engineers use variables to define cycle times and edge placements, allowing for easy frequency scaling during characterization.
Vector/Pattern Loading: Efficiently managing large pattern files is a recurring theme in the manual. It provides instructions on converting third-party formats (like WGL or STIL) into the native 93k binary format. Key Calibration and Maintenance Procedures
To ensure repeatable results across different testers, the Verigy 93k manual emphasizes strict calibration routines.
Standard Calibration (StdCal): This is a software-driven routine that adjusts for internal tester skews. It should be performed weekly or whenever the test head temperature shifts significantly.
Focused Calibration (FocCal): Used for high-precision applications, this calibrates specific pins to the Device Under Test (DUT) interface board level, compensating for traces and socket parasitics.
Diagnostics: The manual includes a comprehensive list of error codes. Running the "Check Health" diagnostic tool is the first step in troubleshooting any hardware failure, such as a blown fuse or a malfunctioning pin electronics (PE) card. Developing a Test Program
A standard test flow in the 93k environment follows a specific hierarchy outlined in the manual:
Continuity/Open-Shorts: The first line of defense to ensure the DUT is seated correctly. DC Parametrics: Measuring leakage currents ( IILcap I sub cap I cap L end-sub IIHcap I sub cap I cap H end-sub ) and power consumption ( IDDQcap I sub cap D cap D cap Q end-sub Today, the systems are called V93000 (Versatile 93000),
Functional Testing: Executing patterns at speed to verify logic gates.
AC Parametrics: Measuring setup/hold times and propagation delays. Advanced Troubleshooting Tips
When the tester behaves unexpectedly, the manual suggests a "divide and conquer" approach. First, verify the hardware by swapping a suspected bad PE card with a known good one. Second, use the Data View tool in SmarTest to inspect real-time waveforms. This allows you to see exactly where a timing edge is falling relative to the data window.
💡 Pro Tip: Always maintain a "Golden Device." If a test fails across multiple units, run the Golden Device to determine if the issue lies with the tester hardware or the test program itself.
By mastering the Verigy 93k manual, engineers can reduce test time, improve yield, and ensure that only the highest quality silicon reaches the market. Whether you are performing wafer sort or final package test, a deep understanding of SmarTest and the 93k hardware is your most valuable asset.
If you want to dive deeper into a specific area of the 93k system, let me know: SmarTest 7 vs. SmarTest 8 differences High-speed digital setup (multi-Gbps) Analog/Mixed-signal testing modules
Title: Navigating the Verigy V93000: A Critical Analysis of the Tester Manual and User Experience
Introduction In the complex world of semiconductor design and manufacturing, the Automatic Test Equipment (ATE) serves as the final arbiter of quality. Among the most prominent platforms in the industry is the Verigy V93000 (often referred to simply as the "93k"). Following Verigy’s acquisition by Advantest, the V93000 solidified its position as a standard for testing System-on-Chip (SoC) and mixed-signal devices. However, the sophistication of the hardware is matched only by the complexity of its operation. The primary interface between the engineer and this machine is the V93000 Tester Manual and its associated software documentation. This essay explores the structure, utility, and challenges of the V93000 manual, arguing that while it is an encyclopedic technical resource, it requires a distinct pedagogical approach to transform from a reference tome into a practical engineering tool.
The Architecture of Documentation The first aspect a user encounters when approaching the V93000 is the sheer scale of the documentation. Unlike consumer electronics, an ATE platform does not come with a single "quick start guide." The manual is a sprawling ecosystem, typically divided into hardware architecture, system software (SmarTest), and specific instrumentation (pin electronics cards like the AV8, MV18, or DPS128).
The hardware sections of the manual are rigorous and precise. They excel at delineating the physical topology of the tester, specifically the "test head," the "test processor," and the crucial "pin electronics." For a test engineer, understanding the signal path from the pin card to the device under test (DUT) is fundamental. The manual provides exhaustive specifications regarding voltage ranges, timing resolution, and current drive capabilities. This level of detail is necessary; in the realm of nanometer-scale semiconductors, a misinterpretation of impedance or bandwidth limitations can result in millions of dollars of yield loss. Therefore, the manual’s strength lies in its role as a definitive reference for "truth" regarding hardware capabilities.
The Software Divide: SmarTest and the Learning Curve While the hardware documentation outlines what the machine can do, the software documentation outlines how to do it. The V93000 operates primarily on the SmarTest software environment. The manuals covering SmarTest are often the source of the steepest learning curve for new engineers.
The documentation introduces a proprietary paradigm. Unlike general-purpose programming languages, ATE programming is event-driven and timing-centric. The manual explains the "tester language," which includes constructs for defining timing sets, levels, and vector memory. However, a common critique among engineers is that the manual often focuses on syntax rather than strategy. It effectively explains what a command looks like, but it frequently struggles to explain the architectural philosophy of why a test should be structured in a certain way.
For example, navigating the documentation regarding the "digital pattern compiler" or "timing and level specifications" requires not just coding knowledge, but a deep understanding of signal integrity. The manual assumes a high level of prerequisite knowledge in test engineering principles. It does not teach testing; it teaches the operation of the specific tool. Consequently, the manual is often viewed as a dictionary rather than a textbook—essential for looking up definitions, but insufficient for learning the language.
Navigating the Transition: Verigy to Advantest A unique challenge in analyzing the V93000 manual is the historical context of the Verigy and Advantest merger. Long-time users often have to navigate a legacy of documentation. Older manuals may reference legacy Verigy terminologies, while newer updates integrate Advantest’s broader portfolio.
This transition has complicated the user experience. While the core V93000 architecture remains, documentation for newer cards or software updates (such as SmarTest 8 or 9) is integrated into a broader knowledge base. The searchability of these manuals has improved with digital integration, yet the fragmentation of information across release notes, application notes, and core manuals remains a hurdle. An engineer often finds themselves cross-referencing three separate documents to diagnose a single calibration error or driver update.
The "Application Note" Culture Perhaps the most telling critique of the standard V93000 manual is the industry’s reliance on "Application Notes." Because the standard manual can be dry and abstract, a secondary market of documentation has emerged. Field Application Engineers (FAEs) and third-party trainers produce guides that translate the manual’s rigid specifications into practical solutions.
This phenomenon suggests that the official manual, while accurate, lacks context. It describes the "AV8" pin card’s drive bandwidth in meticulous detail, but it may not sufficiently explain how to compensate for signal integrity loss at the load board interface. The gap between the manual's theoretical capabilities and the practical reality of a test cell is often bridged by experienced peers rather than the official text.
Conclusion The Verigy V93000 tester manual is a monumental technical achievement, reflecting the sophistication of the hardware it describes. It serves as an indispensable reference for specifications, hardware constraints, and software syntax. However, its utility is heavily dependent on the user's expertise. For the novice, it presents a formidable barrier to entry; for the expert, it is a vital anchor of truth. Ultimately, the V93000 manual exemplifies the broader challenge of technical writing in high-tech industries: balancing the need for exhaustive precision with the necessity of practical guidance. As ATE technology evolves, the documentation must move beyond mere description to become a more integrated, educational framework for the engineers who keep the semiconductor world running.
The Verigy V93000 (V93K) platform stands as a cornerstone in the semiconductor industry, recognized as a highly scalable System-on-Chip (SoC) test platform designed to handle everything from engineering characterization to high-volume manufacturing. Its documentation serves as the essential roadmap for test engineers, detailing a complex architecture built on "test processor-per-pin" technology. 1. Hardware Architecture and Configuration
The V93000 SoC series hardware manual provides a deep dive into its modular structure. Key sections typically cover:
System Classes: The documentation distinguishes between different classes (e.g., A, C, S, and L), which vary in test head size to match specific pin-count and performance requirements.
Core Components: It outlines the water-cooling technology essential for maintaining thermal stability during high-speed tests, the card cage structure, and the pogo block interfaces that connect the tester to the device under test (DUT).
Instrument Modules: Detailed specifications are provided for digital channels (like the Pin Scale 800), Device Power Supplies (DPS), and specialized subsystems like the Wave Scale RF for high-frequency wireless testing. 2. Software and Programming with SmarTest
Central to the manual is the SmarTest software overview, which guides users through the Eclipse-based integrated development environment (IDE).
Test Development: The manual instructs on setting up test flows, defining pin configurations, levels, and timing.
RDI and C++ Coding: Engineers learn to use Rapid Development Instruction (RDI) APIs to write custom C++ test methods for complex digital and DC tests.
Debugging Tools: A significant portion is dedicated to "Shmoo" plots, pin margin tools, and pattern debuggers used to solve fail modes during characterization. V93000｜SoC Test Systems｜ADVANTEST CORPORATION
The Verigy (now Advantest) V93000 tester is a highly scalable Automated Test Equipment (ATE) platform used for semiconductor testing, covering everything from simple microcontrollers to complex SoCs, RF, and High-Speed I/O devices.
The primary repository for all manuals and guidance is the Technical Documentation Center (TDC), which is available as a standalone viewer or integrated directly into the SmarTest software. 1. Accessing the Manuals
Official documentation is proprietary and typically requires a service agreement with Advantest to download from their Software Center.
TDC Viewer: A dedicated application (for Windows and Linux) used to navigate the full suite of V93000 documents.
In-Software Help: Within SmarTest, users can access documentation by selecting Help > Help Contents.
Dynamic Help: Highlighting a specific API in the Test Method editor and selecting Help > Dynamic Help will pull up relevant technical information from the TDC. 2. Core Manual Categories
The documentation suite is divided into several functional areas:
Hardware Overview & Maintenance: Covers system infrastructure, including the different test head classes (A, C, S, and L), power supplies, and cooling systems. It includes procedures for docking loadboards and handling the test head.
SmarTest Software Guide: Detailed manuals for the SmarTest environment (v7.x, v8.x). This includes using the Eclipse-based Workcenter, managing Device Directories, and using editors for timing, levels, and test flows.
Instrument Reference: Specific manuals for hardware cards like:
Pin Scale: Digital testing at various speeds (e.g., PS1600, PS9G).
DC/VI Scale: High-precision DC and device power supply (DPS) modules.
Wave Scale: Modules dedicated to RF and mixed-signal applications.
Programming & Test Methods: Documentation on developing C++ test programs using Universal Test Method (UTM) libraries (e.g., dc_tml, ac_tml, scan_tml). 3. Key Technical Concepts in Documentation
93k Tester 02 Hardware Overview Rev.7.2.2.A.00 | PDF - Scribd
Incorrect pin mapping is the #1 cause of “DUT contact failure.” The manual provides:
| Document Name | Content Summary | |---------------|------------------| | 93K System Reference Manual | Pin electronics, timing sets, voltage levels | | SmarTest Programming Guide | Test method coding (C++/Python), testflow | | Pattern Compiler Manual | Generating TIL/STIL vectors, timing alignment | | Service & Diagnostics Guide | Calibration procedures, channel failure analysis | If you want, I can: